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mosfet inverter nand nor not

Definition

Complementary Metal (Poly-Si) Oxide (SiO2) Semiconductor (CMOS).

NOT NAND NOR

Parameters

channel width $W_{{\rm}n/p}$
channel length $L_{{\rm}n/p}$
gate oxide thickness $t_{{\rm}ox}$
electron mobility $\mu_{{\rm}n} \approx {250e-4\,\mathrm{{\text{m}{\,}}{^{2}}{/}{\text{V}{\,}}{\text{s}{\,}}}}$
$\mu_{{\rm}p} \approx {200e-4\,\mathrm{{\text{m}{\,}}{^{2}}{/}{\text{V}{\,}}{\text{s}{\,}}}}$
rel. permittivity of gate oxide $\epsilon_{{\rm}ox} \approx 3,9$
dielectric constant $\epsilon_0 = {8.8541878e-12\,\mathrm{{\text{A}{\,}}{\text{s}{\,}}{/}{\text{V}{\,}}{\text{m}{\,}}}}$
specific oxide capacity $C'_{{\rm}ox} = \frac{\varepsilon_{{\rm}ox} \varepsilon_0}{t_{{\rm}ox}}$
oxide capacity $C_{{\rm}ox} = C'_{{\rm}ox} \cdot WL$
gain (also $\beta$) $K_{{\rm}n} = \mu_{{\rm}n} C'_{{\rm}ox} \frac{W_{{\rm}n}}{L_{{\rm}n}}$
$K_{{\rm}p} = (-1) \mu_{{\rm}p} C'_{{\rm}ox} \frac{W_{{\rm}p}}{L_{{\rm}p}}$
propagation delay $t_{{\rm}pHL} \propto \frac{C_L t_{{\rm}ox} L_{{\rm}p}}{W_{{\rm}p} \mu_{{\rm}p} \varepsilon_{{\rm}ox} (V_{{\rm}DD} - |V_{{\rm}th}|)}$

Inverter Power

Power Consumption of a CMOS Inverter
Power Consumption of a CMOS Inverter

Dynamic Power Consumption

$$P_{{\rm}dyn} = P_{{\rm}cap} + P_{{\rm}short}$$

Capacitive Power

$$P_{{\rm}cap} = \alpha_{01} f C_L V_{{\rm}DD}^2$$

Short Circuit Power

$$P_{{\rm}short} = \alpha_{01} f \beta_n \tau (V_{{\rm}DD} - 2V_{{\rm}th})^3$$

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